1. Technical Field
The present invention relates to a test apparatus. More particularly, the present invention relates to a test apparatus that judges whether a device under test is acceptable by comparing data output from the device under test with expected value data.
2. Related Art
In recent years, communication standards allowing high-speed data transmission, such as High-Definition Multimedia Interface (HDMI), are proposed. Semiconductor devices configured to control communication compatible with such high-speed communication standards transmit/receive data at a much higher bit rate than semiconductor devices of different types. Therefore, the semiconductor devices designed for such high-speed communication standards may not be tested appropriately by general-use test apparatuses designed for testing general semiconductor devices.
Here, semiconductor devices can be tested in such a manner that a test pattern is input into the semiconductor devices and that the semiconductor devices output patterns in response to the input test pattern. Note that semiconductor devices of a certain type may start outputting responding patterns at random timings. This type of semiconductor devices is configured to output a predetermined pattern at the start of the valid portions of the output patterns, where the predetermined pattern is referred to as a header pattern hereinafter. On condition that the test apparatus detects the header pattern, the test apparatus starts accepting the output patterns, as disclosed in Japanese Patent Application Publications Nos. 2006-10651, 2006-3216, 2006-3331 and 2006-30090.
For the tests of semiconductor devices which transmit data at a very high bit rate and which start outputting responding patterns at random timings, dedicated test apparatuses need to be developed. The development, however, may necessitate enormous costs. To deal with the cost issue, such semiconductor devices may be tested at a low cost by utilizing semiconductor devices of the same type which have been judged acceptable, in other words, golden devices. For example, devices under test are judged acceptable when determined to be capable of appropriately communicating with the golden devices.
However, the results of the tests performed by using the golden devices may be misrepresented by the capabilities of the golden devices. Specifically speaking, even when the timings at which the devices under test output signals are outside a predetermined timing margin, for example, the golden devices may be capable of appropriately accepting the output signals depending on their capabilities. If such happens, the devices under test are mistakenly judged acceptable, even though the devices under test are actually defective. As explained in the above, the tests utilizing the golden devices only determine whether the devices under test can communicate with the golden devices, and therefore can not accurately judge whether the devices under test comply with a certain standard in terms of the signal output timing and the signal voltage level.